openpower

A tiny Open POWER ISA softcore written in VHDL 2008

Code repo for xCAT core packages

Buildroot overlay for Open Power

OPAL boot and runtime firmware for POWER

Unofficial Archlinux port to powerpc64le, powerpc64, powerpc and riscv64

Documentation for OpenPOWER Firmware

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue. It is now being updated for compliancy and integration into open projects.

The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers

Testing Firmware for OpenPOWER systems

OpenPOWER Foundation General Information & Repository Listing

Performance Benchmark Recipes for Power-based systems

The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))

Test Suite

AC922 Interposer Board for DC-SCM BMC - mirrored from OPF git - Maintained by the LibreBMC SIG

Secureboot Signing Utilities

Infrastructure as Code for OpenPOWER Host OS

YADRO machine, based on Romulus reference design

Read LPC FW space using scoms with libpdbg

OpenArena benchmark scripts for porting LLVMpipe to POWER9.