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cpu-model

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pytorch / cpuinfo

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

cpu cpu-model instruction-set cpu-cache cpu-topology cpuid

1079

348

24 天前

MIPT-ILab / mipt-mips

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

mips cpu cpu-cache branch-prediction computer-architecture simulator cpu-model risc Simulation optimizations RISC-V pipeline

C++

353

138

3 年前

wkoszek / cpu60

Example of CPU simulation in software

cpu cpu-model simulator 教学

158

9 年前

sake92 / nand2tetris

Nand2Tetris course solutions

Assembly Scala 编译器 cpu-model 教程

Scala

1 年前

wyvernSemi / riscV

Open source ISS and logic RISC-V 32 bit project

RISC-V Linux C++embedded-systems fpga processor cpu-model Verilog

C++

2 天前

alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpu cpu-model cpu-architecture processor-architecture isa vhdl

VHDL

4 年前

education-script-projects / PyCPU

Central Processing Unit Information Gathering Tool

cpu cpuid cpu-model 安全 system-information linux-system vulnerability-detection

Python

5 年前

zpekic / MicroCodeCompiler

https://hackaday.io/project/172073-microcoding-for-fpgas

fpga vhdl cpu-model mapper stack C#Visual Studio vs2017 Visual Studio Code

1 年前

wyvernSemi / cpu8051

Intel(R) 8051 Instruction Set Simulator

8051 processor cpu-model embedded C

2 年前

evanlissoos / OISC

One Instruction Set Computer

microarchitecture cpu-emulator cpu-model Simulation

Python

8 年前

wyvernSemi / mico32

LatticeMico32 instruction set simulator project

cpu-model C++processor fpga Linux Python tkinter gdb debug tcp-socket serial-communication embedded risc

C++

5 个月前

wyvernSemi / cpu6502

A 6502 Instruction Set Simulator

6502 cpu-model processor 8-bit C Windows Linux

Assembly

1 年前

wyvernSemi / sparc

Sparc version 8 Instruction Set Simulator

sparc simulator C++v8 processor cpu-model

Assembly

3 个月前

leepoly / chisel-pobu-cache

microarchitecture chisel3 computer-architecture cpu-model

Verilog

6 年前

vrobot / cpu-design

8 bit cpu I designed on logisim

cpu-model 8-bit logisim

7 年前

Steve-Teal / pumpkin-cpu

A small general purpose, scalable, 16-bit, 16 instruction CPU core written in VHDL

cpu-model cpu instruction-set

4 年前

morris821028 / hw-radiosity

CPU-based Radiosity: Final Team Project., testing - optimization & parallel skill

webgl computer-graphics parallel-computing cpu-model

C++

8 年前

MIPT-ILab / PipelineFlowchartVis

MIPT-V Pipeline Flowchart Visualizer

simulator cpu pipeline mips Simulation cpu-cache optimizations computer-architecture risc cpu-model RISC-V branch-prediction cycle-accurate

CSS

3 年前

Sh-Zh-7 / tiny-CPU

Tiny series: A handwritten CPU of MIPS instruction set.

cpu-model

Verilog

5 年前

Ismael-K / VHDL

vhdl computer computer-architecture computer-engineering Testing 软件工程 cpu-model embedded-systems

7 年前