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xilinx-fpga

Documenting the Xilinx 7-series bit-stream format.

Python
796
1 天前

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Jupyter Notebook
281
5 天前

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

SystemVerilog
248
12 天前

blaze is a Rust library for ZK acceleration on Xilinx FPGAs.

Rust
145
6 个月前

Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.

Verilog
137
4 年前

SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM

C++
116
6 个月前

Xilinx Virtual Cable Server for Raspberry Pi

C
113
3 年前

FTDI FT600 SuperSpeed USB3.0 to AXI bus master

C++
94
5 年前

Plugins for Yosys developed as part of the F4PGA project.

Verilog
83
1 年前

Minimal DVI / HDMI Framebuffer

Verilog
79
5 年前

Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.

SystemVerilog
76
3 年前
Shell
66
3 年前

💰 A simplified version of an FPGA bitcoin miner 💰

VHDL
52
6 年前

building blocks for accelerating ZK proofs over binary fields

Verilog
45
8 个月前

Re-coded Xilinx primitives for Verilator use

Verilog
45
1 年前

Open-source CSI-2 receiver for Xilinx UltraScale parts

Verilog
37
6 年前

中国科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session

Verilog
32
8 年前

Colorspace conversion, gamma correction, and more -- all integrated within a MIPI-to-HDMI pipeline in FPGA.

VHDL
30
5 年前