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verilator

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verilator/verilator

verilator / verilator

Verilator open-source SystemVerilog simulator and lint system

Verilog system-verilog verilog-simulator verilator compilers C++systemc rtl

C++

3035

694

1 小时前

ultraembedded / riscv

RISC-V CPU Core (RV32IM)

RISC-V cpu Verilog fpga verilator rv32im rv32i asic verification

Verilog

1519

265

4 年前

ZipCPU / zipcpu

A small, light weight, RISC CPU soft core

fpga cross-compiler Verilog verilator cpu

Verilog

1449

172

11 天前

ultraembedded / biriscv

32-bit Superscalar RISC-V CPU

RISC-V rv32i rv32im cpu fpga Verilog verilator asic branch-prediction Linux xilinx artix-7

Verilog

1085

186

4 年前

chipsalliance / Cores-VeeR-EH1

VeeR EH1 core

processor risc RISC-V verilator open-source-hardware rtl fpga

SystemVerilog

889

231

2 年前

ultraembedded / cores

Various HDL (Verilog) IP Cores

Verilog rtl fpga verilator asic audio i2s spi uart usb

Verilog

828

225

4 年前

olofk / edalize

An abstraction library for interfacing EDA tools

eda fpga xilinx yosys synthesis Simulation Verilog vhdl systemverilog verilator

Python

707

210

1 个月前

dpretet / async_fifo

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Verilog verification synthesis fpga asic cdc verilator async

Verilog

366

88

1 年前

mshr-h / vscode-verilog-hdl-support

HDL support for VS Code

Visual Studio Code systemverilog Verilog verilator ctags Hacktoberfest

TypeScript

334

82

9 小时前

ZipCPU / wbuart32

A simple, basic, formally verified UART controller

fpga uart verilator Verilog serialport

Verilog

309

50

2 年前

SD-Card controller, using either SPI, SDIO, or eMMC interfaces

sd-card fpga Verilog verilator

Verilog

306

48

4 个月前

chipsalliance / Cores-VeeR-EL2

VeeR EL2 Core

verilator RISC-V processor open-source-hardware rtl fpga

SystemVerilog

294

88

9 天前

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Verilog systemverilog systemc C++cmake verilator verification rtl Unit testing fpga asic xilinx

SystemVerilog

279

60

6 年前

ZipCPU / dblclockfft

A configurable C++ generator of pipelined Verilog FFT cores

fft fpga Verilog verilator GNU General Public License

C++

246

40

1 年前

ZipCPU / autofpga

A utility for Composing FPGA designs from Peripherals

fpga C++Verilog verilator

C++

183

22

8 个月前

ZipCPU / vgasim

A Video display simulator

Verilog Video GNU General Public License fpga gtkmm verilator vga

Verilog

171

22

3 个月前

ZipCPU / openarty

An Open Source configuration of the Arty platform

fpga fpga-soc verilator

Verilog

131

24

2 年前

A collection of phase locked loop (PLL) related projects

Verilog verilator fpga GNU General Public License

Verilog

108

27

2 年前

chili-chips-ba / wireguard-fpga

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

embedded fpga RISC-V rtl verilator Verilog Virtual Private Network wireguard

Verilog

106

2

1 个月前

ZipCPU / wbscope

A wishbone controlled scope for FPGA's

fpga Verilog verilator debugging-tools

Verilog

83

6

2 年前