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m-labs / nmigen

A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen

fpga Verilog yosys nmigen

Python

677

4 年前

amaranth-farm / amlib

assorted library of utility cores for amaranth HDL

fpga fpga-programming nmigen

Python

1 年前

vmunoz82 / eda_tools

A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, netxpnr-ecp5, nextpnr-gowin, Amaranth HDL, Silice and Verilator.

Dockerfile eda yosys nmigen verilator

Dockerfile

2 年前

bieganski / mtkcpu

RISC-V CPU implementation in Amaranth HDL (aka nMigen)

RISC-V cpu mmu nmigen gdb

Python

1 年前

lambdaconcept / lambdaUSB

A configurable USB 2.0 device core

nmigen usb fpga

Python

5 年前

m-labs / nmigen-boards

Board and connector definition files for nMigen

fpga Verilog nmigen

Python

5 年前

kbob / icebreaker-synth

A simple (audio) synthesizer on the iCEBreaker FPGA.

fpga synthesizer synth nmigen

Python

6 年前

GuzTech / shdl6800

shdl6800: A 6800 processor written in SpinalHDL

fpga Verilog nmigen

Scala

6 年前

amaranth-farm / amgen

command line tool for frequent amaranth HDL tasks (generate sources, show design)

fpga fpga-programming nmigen

Python

4 年前

jeanthom / gram

DDR3 controller for nMigen (WIP)

ram nmigen fpga trellis

Python

2 年前

m-labs / nmigen-stdio

Industry standard I/O for nMigen

fpga Verilog nmigen

Python

5 年前

zignig / tinybx_stuff

Scripts and gateware for the TinyFPGA bx

nmigen

AGS Script

5 年前

mmagm / m6502

6502 CPU implementation written in nMigen

6502 nmigen Verilog fpga yosys

Python

4 年前

personal-army-of-4o / nyanMigen

nyanMigen: pretty face for nMigen (https://github.com/nmigen/nmigen)

Verilog nmigen 前端 fpga asic

Python

4 年前

diodesign / vpu

Vulture Processing Unit: A simple vector-math accelerator for neural networks, written in Verilog using nMigen

nmigen 神经网络 accelerator

6 年前

zignig / gizmotron

Framework for nmigen board building with a boneless cpu

nmigen ice40

Python

5 年前

nmigen1 / nmigen

nMigen - version 1 - A refreshed Python toolbox for building complex digital hardware - MIRRORED - https://gitlab.com/nmigen/nmigen

fpga nmigen Python Verilog rtl

Python

3 年前

cyber-murmel / nmigen-wishbone-examples

A collection of nMigen examples based on the OpenCores WISHBONE Tutorial https://cdn.opencores.org/downloads/wbspec_b4.pdf#page=91

nmigen fpga fpga-soc

Python

5 年前

zignig / spork

Just a spork not the ideal spork

nmigen

Python

3 年前

nmigen1 / nmigen-boards

Board and connector definition files for nMigen - MIRRORED - https://gitlab.com/nmigen/nmigen-boards/

nmigen fpga Python Verilog boards rtl

Python

3 年前