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Xilinx / Vitis-Tutorials

Vitis In-Depth Tutorials

embedded fpga embedded-systems aiengine vitis alveo kria xrt

1432

575

8 天前

Xilinx / XRT

Run Time for AIE and FPGA based platforms

fpga xrt Linux vitis

C++

619

499

1 天前

Xilinx / Vitis_Accel_Examples

Vitis_Accel_Examples

vitis xilinx alveo zynq fpga-programming soc

Makefile

556

221

4 天前

pavel-demin / red-pitaya-notes

Notes on the Red Pitaya Open Source Instrument

dsp fpga Linux radio sdr tcl Verilog vitis vna xilinx zynq

Tcl

371

222

4 天前

definelicht / hlslib

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

vivado-hls sdaccel cmake high-level-synthesis xilinx hpc fpga vitis

C++

322

7 个月前

fpgasystems / Vitis_with_100Gbps_TCP-IP

100 Gbps TCP/IP stack for Vitis shells

tcp vitis xilinx

C++

216

1 年前

Xilinx / xup_vitis_network_example

VNx: Vitis Network Examples

vitis alveo xilinx Network

Jupyter Notebook

152

1 年前

Xilinx / Vitis_Model_Composer

Vitis Model Composer Examples and Tutorials

fpga aiengine hls vitis

C++

105

7 天前

metr0jw / Spiking-Neural-Network-on-FPGA

FPGA based Leaky Integrate and Fire (LIF) neuron model accelerator for PyTorch

Verilog hls pynq vitis xilinx

Verilog

2 个月前

Xilinx / xup_compute_acceleration

Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware

vitis fpga xilinx

C++

1 年前

FedericoSerafini / HLS-CNN

High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.

cnn fpga pipeline parallel stream vitis accelerator hardware synthesis Verilog hls rtl high-level-synthesis asic

1 年前

spcl / apfp

FPGA acceleration of arbitrary precision floating point computations.

vitis vivado-hls xilinx high-performance-computing hpc gmp arbitrary-precision mpfr fpga high-level-synthesis hls

C++

3 年前

lvgl / lv_port_xilinx_zedboard_vitis

This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals

freertos lvgl mouse touchscreen usb vga vitis xilinx amd embedded ntp tcp

2 年前

noecochetel / North_American_Vitis_Pangenome

Construct and Analyze the North American Vitis pangenome

genomics vitis

2 年前

jasonlin316 / GCN-Inference-Acceleration-HLS

An end-to-end GCN inference accelerator written in HLS

hls xilinx vitis gcn inference end-to-end 神经网络

C++

3 年前

CGCL-codes / ScalaBFS

A Scalable BFS Accelerator on FPGA-HBM Platform

fpga bfs computing xrt vitis

Scala

1 年前

IMPETUS-UdeS / rule4ml

Resource Utilization and Latency Estimation for ML on FPGA.

fpga hls Keras 机器学习神经网络 onnx prediction Python PyTorch regression-models resource-utilization vitis

Python

1 个月前

salehjg / DeepPoint-V2-FPGA

The code repository of DGCNN on FPGA: Acceleration of The Point Cloud Classifier Using FPGAs

fpga hls Point cloud xilinx sdaccel vitis 深度学习

C++

2 年前

ribesstefano / Mapping-Multiple-LSTM-Models-on-FPGAs

Includes the SVD-based approximation algorithms for compressing deep learning models and the FPGA accelerators exploiting such approximation mechanism, as described in the paper Mapping multiple LSTM models on FPGAs.

C++fpga hls 机器学习 vitis xilinx

Jupyter Notebook

2 年前

pavel-demin / eclypse-z7-notes

Notes on the Eclypse Z7 development board

fpga zynq dsp tcl Verilog xilinx sdr vitis

2 个月前